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Arm®
The AXI Protocol

The Advanced eXtensible Interface (AXI) protocol is a point-to-point interface specification for masters and slaves. This video ...

0:47
The AXI Protocol

39,887 views

5 years ago

People also watched

MASTER VLSI
AXI PROTOCOL - 1

The AXI (Advanced eXtensible Interface) protocol is a widely used standard for high-performance communication between ...

2:14:37
AXI PROTOCOL - 1

32,534 views

1 year ago

FPGAPS
Xilinx MIG DDR3 Interface: Read and Write using AXI traffic Generators

Read and write data to the external DDR3 using MIG and Axi Traffic generator. The presenter walks through the entire process ...

8:36
Xilinx MIG DDR3 Interface: Read and Write using AXI traffic Generators

3,312 views

7 months ago

composer
AXI Verification IP TestBench
14:56
AXI Verification IP TestBench

7,275 views

5 years ago

Peikm
Creating a custom AXILite IP in Vivado 2020.1

How to create a custom AXILite IP in Vivdado 2020.1 and test it on a Pynq-Z2 board using Python MMIO library. A link to the ...

11:10
Creating a custom AXILite IP in Vivado 2020.1

2,131 views

4 years ago

Victor VL
Prime Intellect : L’agrégateur Ultime de GPUs (Akash + AWS + Bittensor…) - [Capsule #2]

Lien officiel de la plateforme de staking de Pyth network (avec l'Oracle Integrity Staking) : https://bit.ly/VictorPythOIS // RÉSUMÉ ...

13:35
Prime Intellect : L’agrégateur Ultime de GPUs (Akash + AWS + Bittensor…) - [Capsule #2]

5,574 views

1 year ago

anurag choudhury
Microblaze RTL Simulation and AXI Slave wrapper tutorial

This video demonstrates how to run C code on Microblaze without using FPGA by associating the ELF file(generated by Xilinx ...

29:00
Microblaze RTL Simulation and AXI Slave wrapper tutorial

9,713 views

5 years ago

Microelectronic Systems Design Research Group
AXI Memory Mapped Interfaces & Hardware Debugging in Vivado (Lesson 5)

The Xilinx ZYNQ Training Video-Book, will contain a series of Videos through which we will make the audience familiar with the ...

1:52:36
AXI Memory Mapped Interfaces & Hardware Debugging in Vivado (Lesson 5)

121,447 views

11 years ago

MASTER VLSI
AXI PROTOCOL - 2

The AXI (Advanced eXtensible Interface) protocol is a standard for high-performance communication between components within ...

1:55:13
AXI PROTOCOL - 2

10,669 views

1 year ago

VLSIGuru - Best VLSI Training Institute
AHB DEMO SESSION

Course link: https://www.vlsiguru.com/amba-axi-ahb-and-apb/ Mode of training: - Live training for minimum 15 participants ...

1:00:01
AHB DEMO SESSION

17,220 views

3 years ago

José Ribeiro
Sending data to PL using AXI Lite

Code File: ...

11:37
Sending data to PL using AXI Lite

9,158 views

8 years ago

Dillon Huff
What is AXI (Part 1)

In this video I give a brief overview of the AXI protocol.

7:04
What is AXI (Part 1)

114,207 views

6 years ago

Renzym Education
The AXI Protocol, AXI MM and AXI Streaming Interfaces [English]

AXI #AXIstream #AXIMM AMBA AXI Memory Mapped and AXI streaming Interfaces. AXI MM and AXI streaming interfaces are ...

18:56
The AXI Protocol, AXI MM and AXI Streaming Interfaces [English]

26,137 views

3 years ago

Arm®
The AXI Protocol in a multi-master system design

A System on Chip (SoC) with multiple masters can be configured to use the AXI protocol to define the signals and timing of the ...

1:38
The AXI Protocol in a multi-master system design

17,295 views

5 years ago

FPGAs for Beginners
AXI Introduction Part 1: How AXI works and AXI-Lite transaction example

Hi, I'm Stacey, and in this video I discuss AXI! Here's part 2 https://youtu.be/y0z5Cg4gp6k Github Code ...

17:40
AXI Introduction Part 1: How AXI works and AXI-Lite transaction example

37,927 views

2 years ago

ALL ABOUT VLSI
AXI Protocol Explained: Signal and Channel Descriptions | AXI Read & Write Channels Made Easy

In this video, we'll dive deep into the AXI (Advanced eXtensible Interface) protocol — focusing on signal descriptions and channel ...

26:43
AXI Protocol Explained: Signal and Channel Descriptions | AXI Read & Write Channels Made Easy

1,902 views

1 month ago

SiliconAdda
Introduction to Axi4

#Axi protocol #axi #Axi4 #vlsiprojects #vlsi #vlstudies #vlsitraining #amba #Arm #design verification #amba #arm #digital design ...

41:27
Introduction to Axi4

7,033 views

1 year ago

ALL ABOUT VLSI
Introduction to AXI Protocol | AXI Channels Explained | In-Order vs Out-of-Order Transactions

In this video, we dive into the AXI (Advanced eXtensible Interface) Protocol, one of the most widely used AMBA bus protocols in ...

19:52
Introduction to AXI Protocol | AXI Channels Explained | In-Order vs Out-of-Order Transactions

4,625 views

1 month ago

Arm®
AXI Channels

Watch the video to learn more about AXI's five channels. More information about the training that Arm provides can be found here ...

2:14
AXI Channels

24,493 views

5 years ago

Semi Design
AXI Protocol Basics | Prepare For VLSI Industry | Join Our Advance Verification Program

Points of XI that is removed for xi4 and some new things were added okay so before that okay let me start with XI protocol and its ...

47:57
AXI Protocol Basics | Prepare For VLSI Industry | Join Our Advance Verification Program

9,718 views

1 year ago

FPGAs for Beginners
AXI Stream basics for beginners! A Stream FIFO example in Verilog.

Hi, I'm Stacey, and in this video I go over the basics of the AXI stream interface. HDLforBeginners Subreddit!

12:11
AXI Stream basics for beginners! A Stream FIFO example in Verilog.

46,050 views

4 years ago

ALL ABOUT VLSI
AXI Protocol Handshaking Explained | VALID–READY Handshake | AMBA AXI for VLSI Beginner

Master the VALID–READY handshaking mechanism in the AXI protocol in this beginner-friendly yet industry-focused video!

28:11
AXI Protocol Handshaking Explained | VALID–READY Handshake | AMBA AXI for VLSI Beginner

1,139 views

1 month ago