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143,741 results

Microelectronics
34 DLLs

This is one of a series of videos by Prof. Tony Chan Carusone, author of the textbook Analog Integrated Circuit Design. It's a series ...

15:26
34 DLLs

11,834 views

4 years ago

VLSI Open Resources
DLL Digital Delay‐Locked Loop in SDRAM

https://t.me/vlsimemorysystems/620.

34:20
DLL Digital Delay‐Locked Loop in SDRAM

234 views

11 months ago

SSCD IIT Kanpur
Lecture 3: Delay-locked loop, tunable delay line

Lecture 3 covers the basic structure of a delay-locked loop, consisting of a phase detector, charge pump, capacitor and a variable ...

1:09:50
Lecture 3: Delay-locked loop, tunable delay line

4,444 views

1 year ago

SSCD IIT Kanpur
Lecture 8: Locking nonidealities in a DLL

In this lecture, we learn about locking nonidealities such as stuck locking, harmonic locking and locking with a static phase offset.

1:04:40
Lecture 8: Locking nonidealities in a DLL

863 views

1 year ago

barmak mansoorian
ECE4203ClockPLLDLL
1:43:07
ECE4203ClockPLLDLL

47 views

5 years ago

kashyap B
26. PLL Phase Locked Loop (part 5) and DLL (Delay Locked Loop)

For more video lectures not available in NPTEL ,...... www.satishkashyap.com Video lectures on "CMOS Mixed Signal VLSI ...

1:07:13
26. PLL Phase Locked Loop (part 5) and DLL (Delay Locked Loop)

6,483 views

12 years ago

kashyap B
20. Delay Locked Loop (DLL)

For more video lectures not available in NPTEL ,...... www.satishkashyap.com Video lectures on "CMOS Mixed Signal VLSI ...

1:24:50
20. Delay Locked Loop (DLL)

18,677 views

12 years ago

iwonderwhy158
Delay Locked Loops: EE431 Project Presentation
9:45
Delay Locked Loops: EE431 Project Presentation

996 views

4 years ago

SSCD IIT Kanpur
Lecture 4: Delay tuning using varactors, phase detector

Delay tuning can also be achieved by tuning a variable capacitance. In this lecture we look at the behavior of a varactor and learn ...

1:08:44
Lecture 4: Delay tuning using varactors, phase detector

1,473 views

1 year ago

Ekeeda
Jitter in PLL and Delay Locked Loops - Mixed Signal Circuit - Analog & Mixed VLSI Design

Subject - Analog & Mixed VLSI Design Topic - Jitter in PLL and Delay Locked Loops Chapter - Mixed Signal Circuit Faculty - Prof.

6:54
Jitter in PLL and Delay Locked Loops - Mixed Signal Circuit - Analog & Mixed VLSI Design

4,234 views

3 years ago

SSCD IIT Kanpur
Lecture 6: Locking in a DLL

EE 698G: Circuit design for frequency and phase synthesis (2023) Instructor: Chithra ( https://home.iitk.ac.in/~chithra ) MVLSI, EE, ...

1:03:02
Lecture 6: Locking in a DLL

1,831 views

2 years ago

ElectronicsNotes
Phase Locked Loop Tutorial: the basics of PLLs

This video provides the essential insights into understanding PLLs, Phase Locked Looks and how they work, giving a very ...

6:34
Phase Locked Loop Tutorial: the basics of PLLs

434,236 views

9 years ago

SSCD IIT Kanpur
Lecture 7: Locking in a DLL

In this lecture, we understand how the negative feedback loop in the DLL achieves the steady-state delay of one reference period ...

53:54
Lecture 7: Locking in a DLL

886 views

1 year ago

Wing Chau Ng
ELEC3500_Lecture21_handshakeFIFI_EMI_SSC
17:14
ELEC3500_Lecture21_handshakeFIFI_EMI_SSC

4 views

3 years ago

SSCD IIT Kanpur
Lecture 13: Type-II DLL, DLL applications, noise review

EE 698G: Circuit design for frequency and phase synthesis (2023) Instructor: Chithra ( https://home.iitk.ac.in/~chithra ) MVLSI, EE, ...

1:04:26
Lecture 13: Type-II DLL, DLL applications, noise review

458 views

2 years ago

BP International
Frequency Multiplier with Delay Locked Loop -Based Clock Generator for System on Chip Applications

Frequency Multiplier with Delay Locked Loop -Based Clock Generator for System on Chip Applications View Book ...

2:56
Frequency Multiplier with Delay Locked Loop -Based Clock Generator for System on Chip Applications

44 views

4 years ago

Han Han
20150514 Fang Delay Locked Loop
35:13
20150514 Fang Delay Locked Loop

3,026 views

10 years ago