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8,890 results

VLSI Gold Chips
Top 6 VLSI Project Ideas for Electronics Engineering Students 🚀💡

In this video, I've shared 6 amazing VLSI project ideas for final-year electronics engineering students. These projects will boost ...

0:09
Top 6 VLSI Project Ideas for Electronics Engineering Students 🚀💡

316,100 views

10 months ago

Sanchit Kulkarni
Top VLSI Projects using Open Source Tools in 2025 | Beginner to Advance level | Designing GPU unit

Must Do VLSI Projects using Open Source Tools from Basics to Advance These are projects for ECE/EEE/EIE students. Datapath ...

19:09
Top VLSI Projects using Open Source Tools in 2025 | Beginner to Advance level | Designing GPU unit

39,147 views

4 months ago

AA
Xilinx ISE: Design and simulate VERILOG HDL Code

Learn to simulate your digital designs using Xilinx ISE. This short video will save lots of time and will help you to start the ...

7:37
Xilinx ISE: Design and simulate VERILOG HDL Code

51,285 views

2 years ago

Electro DeCODE
How to Create First Xilinx FPGA Project in Vivado? | FPGA Programming | Verilog Tutorials | Nexys 4

This video provides you details about creating Xilinx FPGA Project. Contents of the Video: 1. Introduction to Nexys 4 FPGA Board ...

17:48
How to Create First Xilinx FPGA Project in Vivado? | FPGA Programming | Verilog Tutorials | Nexys 4

68,910 views

5 years ago

Circuit Sage
VLSI Design 704: Traffic light controller

Welcome to Circuit Sage, the ultimate destination for electronics enthusiasts and aspiring circuit designers. On this channel, we ...

12:15
VLSI Design 704: Traffic light controller

4,862 views

2 years ago

Pantech.ai(Warriors Way Hub)
Top 10 FPGA Projects   2019 | #pantechsolutions #fpgaproject

Dive into a world where technology, business, and innovation intersect. From the realms of A.I and Data Science to the ...

7:47
Top 10 FPGA Projects 2019 | #pantechsolutions #fpgaproject

38,747 views

6 years ago

Circuit Sage
VLSI Design 306: Area and power measurement in Vivado

Welcome to Circuit Sage, the ultimate destination for electronics enthusiasts and aspiring circuit designers. On this channel, we ...

14:42
VLSI Design 306: Area and power measurement in Vivado

8,421 views

2 years ago

Arjun Narula
Voting Machine in Verilog (with code) | Verilog project | XILINX | EDA Playground

In this Verilog project, a Voting Machine has been implemented by Mr. Harman in Verilog HDL on EDA Playground. Please do ...

18:27
Voting Machine in Verilog (with code) | Verilog project | XILINX | EDA Playground

82,242 views

3 years ago

VLSI Gold Chips
📌 5-Minute FPGA Basics – Learn Fast! ⏳!!

Want to understand FPGA basics in just 5 minutes? Here's a quick breakdown! What is an FPGA? It's a reconfigurable chip that ...

0:11
📌 5-Minute FPGA Basics – Learn Fast! ⏳!!

37,163 views

8 months ago

Suraj Maity
And Gate in Xilinx | Xilinx Tutorial

Xilinx Tutorial: we will learn and gate simulation. And gate && using vhdl language && xilinx. Using VHDL language, we have ...

8:54
And Gate in Xilinx | Xilinx Tutorial

37,738 views

4 years ago

Takeoff Edu Group
A Novel Approach For Parallel CRC Generation For High Speed Application | VLSI Projects Using Xilinx

A cyclic redundancy check (CRC) is an error-detecting code commonly used in digital networks and storage devices to detect ...

2:03
A Novel Approach For Parallel CRC Generation For High Speed Application | VLSI Projects Using Xilinx

132 views

4 years ago

Dr. Ravikant Khamitkar
VLSI Design Software Introduction Xilinx ISE

Same like if you are using the fpga spartan 3 save that family spartan 3 select the device name which is a XC 3 s400 package P ...

5:01
VLSI Design Software Introduction Xilinx ISE

3,650 views

5 years ago

Dr Kay
Simulating D Flip-Flop on Xilinx: ISE Design Suite| Verilog HDL| Behavioral Modeling| Digital Design

So here you need to select the desired directory where you want to store your project and click Next select required parameters so ...

12:51
Simulating D Flip-Flop on Xilinx: ISE Design Suite| Verilog HDL| Behavioral Modeling| Digital Design

18,070 views

5 years ago

Circuit Sage
VLSI Design 108: Simulation using Xilinx Vivado

Welcome to Circuit Sage, the ultimate destination for electronics enthusiasts and aspiring circuit designers. On this channel, we ...

6:25
VLSI Design 108: Simulation using Xilinx Vivado

463 views

2 years ago

VLSI Placement
2 VLSI projects (Verilog) that added value to my resume | #VLSIPLACEMENt #nvidia  #interview  #coap

Two vlsi verilog projects explained in this video are: 1.RISC processor by Indranil sen Gupta NPTEL lectures IIT Kharagpur 2.

2:51
2 VLSI projects (Verilog) that added value to my resume | #VLSIPLACEMENt #nvidia #interview #coap

19,441 views

1 year ago

Vipin Kizheppatt
Designing a Simple Voting Machine using FPGAs with Verilog HDL and Vivado

VotingMachine #Verilog #Vivado #Xilinx #FPGA In this video we go through the complete design flow of a simple voting machine ...

1:03:35
Designing a Simple Voting Machine using FPGAs with Verilog HDL and Vivado

32,173 views

5 years ago

VLSI FOR ALL
TOP 5 FRONTEND VLSI Projects | Digital Electronics Projects | RTL Design & Verification Best Project

TOP 5 FRONTEND VLSI Projects | Digital Electronics Projects | RTL Design & Verification Best Projects Register in BEST VLSI ...

11:53
TOP 5 FRONTEND VLSI Projects | Digital Electronics Projects | RTL Design & Verification Best Project

8,414 views

11 months ago

Md Nasim Afroj Taj
Password Based Lock System using Verilog HDL & Proteus Simulation

This is the demonstration for my project titled, "4x4 Password-Based Door Lock System using Verilog HDL & Proteus Simulation" ...

20:03
Password Based Lock System using Verilog HDL & Proteus Simulation

8,615 views

4 years ago

Arjun Narula
HDL Verilog Project (with code) | Clock with Alarm | Xilinx Vivado

In this Verilog project Clock with Alarm has been implemented in Verilog HDL. Please find the Verilog code below: Github Link ...

8:30
HDL Verilog Project (with code) | Clock with Alarm | Xilinx Vivado

28,986 views

3 years ago

LogN
And gate implementation using Xilinx 8.1i

Xilinx introductions with and gate.

5:59
And gate implementation using Xilinx 8.1i

1,960 views

2 years ago